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Nel campo della Circuito stampato (PCB) manufacturing and electronics engineering, few failure mechanisms have been as detrimental and deceptively destructive as Conductive Anodic Filament (CAF). As PCB designs become denser, component sizes decrease, and the operational environment becomes more extreme, the likelihood of CAF-related failures increases.
To ensure reliable products for use in aerospace, automobilistico, medical device, and industrial applications, design engineers, quality assurance professionals, and all involved with the manufacture of electronic equipment should be knowledgeable regarding CAF. This detailed resource covers everything you want to know about Conductive Anodic Filaments, how they damage PCBs, testing methods for determining CAF, and most importantly, ways to protect against this destructive mechanism.
What Is Conductive Anodic Filament (CAF)?
CAF has been identified as an electrochemical failure mode for printed circuit boards, in which the migration of metal ions through the laminate substrate creates an electrical path between two conductors within the laminate. The primary source of the majority of failures resulting from CAF is the movement of metallic copper ions across the epoxy resin-glass fibers from a plated-through-hole or via.
Metallic copper ions create a conductive filament, made up of copper salt, by moving across the glass fiber-epoxy resin boundary of a laminate used to construct a printed wiring board. Therefore, CAF may be considered as a parasitic copper pathway that moves through the internal layers of the laminate of a printed circuit board until it makes contact with two conductors that were designed to be electrically isolated. When these two conductors make contact due to the presence of the parasitic pathway, a cortocircuito occurs and/or insulation breaks down， potentially leading to total failure of the printed circuit board.
Process for Creating CAF Filaments
The formation process for filaments caused by CAF is electrochemical in nature. As a result, three requirements must be met at the same time before the onset of filament formation:
1. An Applied Bias Voltage (An Electric Field)
A bias voltage is necessary when forming filaments using the CAF failure mode. This means that there must exist an applied voltage on two conductor elements that are close enough to each other so as to allow for copper ion migration.
2. Presence of Moisture
Water or humidity absorbed into the laminate acts as an electrolyte, allowing ionic conduction within the substrate. Without the presence of moisture, propagation of CAF cannot occur. Thus why CAF is so much more likely to occur in high-humidity operating environments and sealed enclosures undergoing thermal cycling.
3. A Pathway for Copper Ion Migration
The glass fiber-epoxy resin interface must provide a pathway with low resistance. When the adhesion bond strength between the glass fibers and epoxy resin deteriorates due to stress termico, mechanical drilling, or absorption of moisture into the laminate, it provides a channel along which copper ions can travel.
As soon as these three conditions align, the oxidized and dissolved copper at the positively charged conductor (the anode) travels along the compromised glass fiber interface toward the negatively charged conductor (cathode), where they are reduced and deposited as solid copper. Over time, the deposited copper continues to grow, forming a filamentary bridge, a Conductive Anodic Filament, that may reduce insulation resistance to dangerously low levels.
How Does CAF Affect PCB Performance?
Understanding how CAF affects PCB performance depends on how this failure mechanism affects the overall reliability of your electronics. CAF rarely causes catastrophic, sudden system failure. Instead, it tends to be a slow-degrading fault mechanism. The effects of CAF may show up after you have put the product into service in the field.
1. Deterioration in Surface Insulation Resistance between Affected Conductor Paths
Probably the first and most quantifiable sign of CAF’s degradation is its significant reduction in the surface insulation resistance (SIR) between any two conductor paths that are influenced by the CAF filament(s).
Most “healthy” PCB laminates have SIR levels greater than 10^9 Ohm. When a CAF filament has developed and grown sufficiently to bridge two conductor paths, the SIR drops rapidly by multiple orders of magnitude. As a result, an unintended path of current exists between two previously insulated conductor paths, creating unwanted electrical phenomena such as unexplained signal behavior and/or other intermittent problems.
2. Shorts and Failure Due to Electrical Overload
Once a completely developed CAF filament connects two conductor paths together, they essentially become electrically connected; thus, a short circuit is created. Depending upon the voltage level of the application, shorts can lead to thermal runaways and fires in the case of high-voltage applications. In addition, shorts can also create power surges, component overheating, etc. In low-power, low-voltage applications (i.e., digital CI), even partial shorts caused by CAF filaments can create problems such as spurious logic states and/or data transmission errors.
3. Intermittent Field Failure
Another problem with CAF-related failures is that they tend to act in an intermittent manner. Due to the sensitivity of CAF development to environmental conditions such as moisture content and temperature, a PCB may appear to function perfectly well under laboratory test conditions yet begin to fail randomly while operating in the field under fluctuating environmental conditions.
Thus, diagnosis and correction of these types of failures can be time-consuming and costly; further, diagnostic efforts may result in replacing components unnecessarily or redesigning entire printed wiring boards.
4. Reducing System Life Expectancy
CAF’s ability to form a path for electrical conduction can significantly shorten the life expectancy of a PCB designed for extended service periods. For example, PCBs used in applications requiring ten to twenty years of service are highly susceptible to CAF because of increased susceptibility to moisture absorption and subsequent loss of laminate bond strength during thermal cycles.
CAF Testing Process: How to Detect and Evaluate CAF Risk
Electronics manufacturing and quality control have developed many testing methods to measure how well Printed Circuit Board (PCB) laminates and final assemblies resist Conductive Anodic Filament (CAF) growth. As a result of these testing procedures, manufacturers are able to determine if their designs and/or materials will likely be at risk for CAF growth prior to reaching their end-users.
Applicazioni dei circuiti stampati ad alta velocità
IPC-TM-650 Method 2.6.25: CAF Testing’s Standardized Methodology
The most common standardized testing procedure for assessing a material’s ability to resist CAF growth is found in IPC-TM-650, Test Method 2.6.25. Developed by IPC, the global trade association for the electronic interconnect manufacturing supply chain, this test method assesses a PCB laminate’s resistance to CAF growth based upon its Insulation Resistance (IR), which is evaluated during the application of a bias voltage under elevated temperature and humid conditions.
Application of Stress Conditions
After thermal preconditioning, conditioned specimens are placed inside a temperature and humidity-controlled chamber where they are exposed to simulated aging conditions. The standard test conditions specified in the IPC-TM-650 include:
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Temperature: 85 °C
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Relative Humidity: 85 % RH
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Bias Applied DC Voltage: 100 V DC (or the application-specific voltage)
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Duration of Stress Exposure: 500 hours minimum (longer tests may continue longer than 1,000 hours)
SEM and Cross-Sectional Analysis
Failed or suspect specimens that were subjected to accelerated stress testing are examined using Scanning Electron Microscopy (SEM) and cross-sectional metallography techniques to visually verify both the existence and morphology of CAF filaments. Using SEM allows engineers to directly observe copper filament growth along glass fiber-resin interfaces and visualize the complete failure path of CAF-related failures.
EDS/EDX Elemental Analysis
In addition to SEM analysis, Energy Dispersive Raggi X spectroscopy (EDS or EDX) can be utilized for elemental analysis of suspected CAF deposits. EDS analysis will provide confirmation that copper exists within the identified filamentary growth and distinguish it from other types of contaminants or failure mechanisms, such as Ionic Contamination or Electrochemical Migration on the board surface.
Specimen Preparation
Typically, specimens used for evaluating CAF growth according to the IPC-TM-650 specifications are PCB coupons with a “comb” pattern; these have via-to-via spacings that best represent worst-case design scenarios.
Some typical spacings tested according to the IPC-TM-650 specifications include 0.5 mm, 0.625 mm, 0.8 mm, and 1.0 mm center-to-center spacings of vias, representative of high-density and ultra-high-density design layouts.
Pre-conditioning
Before applying stress conditions to test specimens, specimens are thermally preconditioned to mimic the stresses associated with the PCB manufacturing process.
Before conducting the CAF stress testing, the specimens undergo thermal preconditioning to introduce delamination and micro-cracks into the laminate structure to better replicate the realistic damage introduced during the manufacture of actual printed circuit boards.
Monitoring IR During Stress Testing
During all phases of the test duration, IR values are monitored at fixed intervals; usually every 24 to 168 hours, depending on the test methodology. A specimen is considered to have failed due to CAF growth when the IR value decreases to less than a predetermined threshold value, usually 1 × 10⁶ ohms (1 MOhm) as defined by the IPC standards.
Statistical Time-to-Failure (TTF) Analysis and Weibull Distribution Models
Many advanced CAF testing programs use TTF analysis using Weibull distribution models to extrapolate data obtained from accelerated testing to predict real-world operating lifetimes. Multiple specimens are stressed at multiple different voltage and humidity levels and Weibull Probability Plots are constructed to estimate the likelihood of CAF-related failures occurring at operational conditions and service lives of intended applications.
How to Prevent CAF in PCBs: Design, Material, and Process Strategies
The prevention of CAF (conductive anodic filament) failure represents a multi-faceted problem area encompassing PCB laminate choices, design layouts, manufacturing process control and environmental conditions during assembly. In order to mitigate CAF effectively, it is necessary for engineers to consider all contributors to CAF concurrently; no one strategy will be effective alone.
1. Choose a CAF-Resistant PCB Laminate Material
The PCB laminate selected by the designer has the largest influence on preventing CAF failures. Not all FR-4 laminate materials are created equal. The adhesion quality of glass fiber-epoxy resin bonding varies widely among laminate grades and suppliers. When designing PCBs that may require any of the following considerations, engineers should select Laminates that have been qualified for CAF resistance according to IPC-tm-650 2.6.25.
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High-layer-count boards (greater than or equal to 8 layers)
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Small pitch via structures (less than or equal to 0.8 mm via-to-via spacing)
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High-temperature operating environments
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High-humidity operating environments
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Extremely long service life requirements (greater than 10 years)
Engineers selecting higher performance laminate systems, including low-halogen, high-Tg materials and those designed with better silane coupling agents on the glass fibers, experience fewer CAF failures versus standard grade commercial FR-4 materials. Suppliers of laminate materials, including Isola, Ventec, Panasonic, and other companies, produce CAF-characterized material grades that provide their customers with published test results from IPC-tm-650 testing.
2. Maximize PCB Via and Through-Hole Spacing
Design decisions made in the early stages of the PCB design process directly affect the potential for CAF failures. Design engineers should use the following PCB design techniques to minimize the potential for CAF failures:
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Increase via-to-via spacing whenever possible. Increasing the spacing increases the distance that water vapor must migrate to create a pathway for electrical conduction.
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Avoid placement in a straight line with adjacent high-voltage conductors. Water vapor migrates more easily down straight glass fibers than through other means. Placing vias in an offset pattern prevents this pathway.
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Keep high-voltage conductors away from adjacent ground or low-voltage conductors. This is especially important in power electronic applications or applications involving high voltages.
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Place vias in staggered arrays in densely populated areas instead of placing them in a grid array. In grid arrays, multiple holes are often placed so close together that they share the same glass fiber pathways.
3. Manage the Drilling Process of PCB
Drilling of the PCB laminate creates via holes and plated through-holes and is also a major contributor to the potential for CAF failures. Using aggressive drilling settings, i.e., large feed rates, dull drills, and poor chip removal, causes additional mechanical stress at the glass fiber-resin interface, resulting in damaged adhesive bonds that allow CAF failures to occur.
Process control methods for minimizing drilling-induced CAF include:
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Using sharp, well-maintained drill bits and limiting hits and stack height based upon the supplier’s recommendations
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Setting up drill feeds and speeds to minimize heat and mechanical stresses to the laminate
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Utilize back-up and entrance materials that minimize fiber breakage at hole entrances and exits
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Periodically inspect drilled holes utilizing microsections.
4. Maintain Strict Moisture Controls during Manufacturing
Moisture is an essential component in enabling CAF growth. Controlling moisture exposure during PCB manufacture and assembly is an important method of CAF prevention:
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Dry bare PCB laminates and finished assemblies before mounting components to remove absorbed moisture, particularly after extended storage periods in humid environments
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Maintain storage of bare PCBs and laminate supplies in low-humidity environments (preferably < 40% relative humidity).
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Comply with IPC-1601 guidelines regarding handling and storing bare PCBs to limit moisture absorption before and during mounting of components;
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Provide proper ventilation and temperature Control in work areas to preclude the formation of moisture on board surfaces due to thermal cycling operations.
5. Utilize Conformal Coatings for Field Protection
In addition to being beneficial for protecting against other forms of environmental degradation, applying a conformal coating over a PCB intended for severe field exposures, e.g., outdoors, automotive underhood applications, marine electronics, or industrial environments exposed to extreme humidity, will provide a physical barrier to moisture entering the PCB laminate and thus greatly decrease the moisture-driven electrochemical reactions that facilitate CAF growth. Conformal coatings such as acrylic, silicones, urethanes, or epoxies may be applied according to IPC-cc-830 standards for moisture reduction in PCBs subjected to field exposure.
6. Design for Voltage Stress Management
Another effective way to prevent CAF is to decrease the electrical driving force behind CAF. High voltage differences between two conductors placed close together are a common occurrence in circuits. The designer can use the following methods to mitigate this problem:
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Add guard rings or guard traces at ground potential between two high-voltage conductors to lower the effective electric field over the dielectric gap.
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Utilize DRC software, which has built-in CAF-aware clearance rules to alert designers when there are two high-voltage conductors that do not have enough space based on the laminate CAF specification.
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Use voltage distribution maps during the Layout del PCB phase to determine and revise critical design elements between two adjacent high-voltage conductors prior to finalizing a PCB for manufacturing.
7. Evaluate PCB Manufacturers with CAF-Specific Testing
Regardless of how well a printed board laminate material is designed to resist CAF, poor fabrication process control can still compromise its ability to withstand CAF. Therefore, both original equipment manufacturers (OEMs) and contract manufacturers need to include CAF-related qualification requirements as part of their PCB fabricator qualification processes. These requirements may include:
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A review of the fabricator’s documentation related to the drilling process.
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Documentation showing that the fabricator has completed IPC-TM-650 2.6.25 CAF testing on process qualification coupons.
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Documentation showing traceability from each laminate material lot number to CAF-qualified material specifications.
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Documentation demonstrating Cpk results on key process factors affecting laminate integrity.
Conclusione
Anche se conductive anodic filament (CAF) formation has multiple factors contributing to its failure mechanism, there are no easy fixes for this problem. In addition, as printed circuit board (PCB) designers continue to improve their ability to produce higher-density boards with improved performance in extreme environments, the potential for CAF to cause electrical failures will likely increase.
However, undersanding the causes of this failure helps prevent and resolve it. If the correct combination of CAF-resistant laminates, suitable PCB layouts, rigorous fabrication control procedures and test protocols based on recognised industry standards (e.g. IPC) are used, alongside effective moisture management methods during manufacturing and storage, the risk of CAF-related failures can be significantly reduced.
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